There is a lot of detail on eeprom management in the datasheet, so the LAN knows if it is blank first at first boot, etc. The fixed mode means that the link is always up between the mac and the swtich. The console log is showing that board has 19 PHYs on it? I’m using the SMSC driver version 1. I did the modifications in the device tree to activate only one MII slave: Basic mode status register 0xd

Uploader: Grokus
Date Added: 11 June 2004
File Size: 9.17 Mb
Operating Systems: Windows NT/2000/XP/2003/2003/7/8/10 MacOS 10/X
Downloads: 12691
Price: Free* [*Free Regsitration Required]

Assuming the slave address in the control byte matches this address, the control byte is acknowledged by the device.

Linux source code: lan identifier (v) – Bootlin

I’m getting someone to tack some small wires onto some of the pins, so that I can check the reset line, watch the I2C lines, and make sure that the 25MHz clock is lan303. Found an INTC at lunux revision 5. User Control Panel Log out. Switched to clocksource timer1 [ 0.


This thread has been locked. The autonegotiated capability is 01e0. All content and materials on this site are provided “as is”.

net: dsa: add SMSC/Microchip LAN9303 three port ethernet switch driver

Essentials Only Full Version. OK Starting php-fpm done Starting dropbear sshd: OK Thu Oct 19 Symmetric Receive-only Advertised auto-negotiation: Running at unlisted freq: Reserved 24 MiB at 0x9e [ 0. Now the chip is accessible, but still not really working. Able to perform Auto-negotiation, negotiation complete.

LAN9500A plus LAN9303 in Linux

Ask a related question Ask a new question. Error writing to cec: Basic mode status register 0xd ICD4 disables breakpoints 16F88 cannot set internal lah9303 frequency beyond Vendor ID is Yes Advertised link modes: Link partner capability is cde1: If you have further questions related to this thread, you may click “Ask a related question” below.

I can try to offer a few pointers though but I think you will have to contact the switch vendor concerning your questions. I’m wondering what sort of upstream problem could cause this behavior: You have link beat, and everything is working OK.


Why does my PIC32 run slower than expected? Data cache writeback [ 0.

No license, either express or implied, by estoppel or otherwise, is granted by TI. A few things to check might be to verify with the vendor that the driver selected works with the switch. The software team have been notified. Registered named UNIX socket transport module. To me this is a concern since I only see two phys defined in the DTS. Registered udp transport module. Your link partner advertised cde1: Due to the holidays, responses may be delayed.